ASIC, Application Specific Integrated Circuit, is an electronic circuit created for a specific purpose rather than for general use. ASIC design engineers create product design specification statements for ASIC, optimize logic design, and create architectural design models. Some examples of ASIC chips include CPU, satellite chips, robotic chips, chips designed to run a cell phone, Bitcoin Miner, chip used in a voice recorder, etc.
ASICs can have different designs that allow specific actions to be taken inside of a particular device. The two primary design methods are gate-array and full-custom design.
In a gate-array design, non-recurring engineering costs are much lower due to the minimal design work needed to make a working chip. Production cycles will also be much shorter since metallization is a faster process as compared to full-custom design. In addition, gate-array designs are often larger in size, meaning a larger power requirement.
A gate-array design is a manufacturing method in which the diffused layers, transistors, and other active devices are predefined, and wafers containing such devices are held in stock prior to metallization. Once ready for the final design, the engineer will open and close certain switches to cause the chip to act in the way required. This kind of design is the “stock” design, which can be easily produced but may not completely suit the task it is used for.
A full-custom ASIC design is slightly more complex than a gate-array. However, this increase in complexity means that the chip can do much more than its counterpart. In many instances, the size of an ASIC can decrease dramatically in relation to a gate-array design due to the level of customization and deletion of unneeded gates.
These ASICs however are designed specifically for one client to provide certain functions required by the client’s end product. For example, a cell phone company may design an ASIC to combine the display backlight controller with the battery charging circuit into a single IC in order to make the phone smaller. To accomplish this change requires people to design the logic of the chip, taking a lot of time and effort that makes them only worthwhile for large scale projects, where efficiency and size are important.